Built-in-Test (BIT) for Radio Frequency Integrated Circuits (RFIC) is an effective method to reduce the testing cost, especially with the increase of integration level and operating frequency. In this work, a fully integrated CMOS BIT methodology is proposed. The BIT circuit used is rectifierbased and gate-source connected MOS transistor with Substrate Positively-Biased (SPB) scheme is used to further improve the detecting sensitivity. With little current consumption, high input impedance and high frequency scalability this circuit can predict complex high frequency performances of RF circuits such as gain, operating frequency, bandwidth and linearity. Besides, the influence of Process, supply Voltage, and Temperature (PVT) variations on the performance of RF circuits can also be monitored by using this BIT circuit. Â© 2006 IEEE.